rai o RA8870 character/graphic tft lcd controller specification version 1.1 february 7, 2013 ra i o technology inc. ? copyright raio technology inc. 2010, 2011, 2012, 2013 rai o technology inc. 1/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 1. description RA8870 is a tft lcd controller whic h supports the character and graphic mixed display. it is designed to meet the requirement of middle size tft module up to 640x480 pixels with characters or 2d graphic application. with internal ram, RA8870 can supports 65k color for 320x240 dots tft panel, 4k color for 640x240/320x480 display , or 4k color for 320x240 dots with 2-layers. with external ram, it supports up to 65k color for 640x480 panel. the embedded cgrom is capable to display the alphase t of international standard iso 8859-1/2/3/4. it includes 256x4 characters and can satisfiies almost english or eurpean language family countries. for graphic usage, RA8870 supports a 2d block transfer e ngine(bte) that is compatible with 2d bitblt function for processing the mass data transfer func tion. the geometric speed-up engine provides user an easy way to draw the programmable geometric shape by hardware, like line, square and circle. besides, many powerful functions are combined with RA8870, su ch as screen rotation function, scroll function, graphic pattern, 2-layer mixed disp lay and font enlargement function. these functions will save user a large of software effort during developement period. RA8870 is a powerful and cheap choice for color applic ation. to reduce the system cost, RA8870 proivde low cost 8080/6800 mcu i/f, a flexible 4/5-wires touch panel controller, pwm for adjusting panel back-light and some gpios. with the RA8870 design-in , user can achieve an ea sy-to-use, low-cost and high performace system compared with the other solution. 2. feature ? support text/graphic mixed display mode. ? clock source: external x?tal clock input with internal pll. ? color depth tft: 256/4k/65k colors. ? supporting mcu interface: 8080/6800 with 8/16 data bus width. ? internal ddram size: 230kb ? embedded 10kb character rom with font size 8x16 dots and supporting character set of iso8859-1/2/3/4. ? support gb-2312 and big-5 encoding with external font rom of font size 16x16 dots. ? external ddram up to 512kbyte*16. ? font enlargement x1, x2, x3, x4 for horizontal or vertical direction. ? support tft 8/12/16-bits generic rgb interface and analog tft panel interface. ? flexible tcon block compatible with most analog panel. ? screen display rotation 90, 180 and 270 for different panel type. ? support font vertical rotation. ? support block scroll for vertical or horizontal direction. ? embedded block transfer engine (bte) with 2d function. ? embedded geometric speed-up engine. ? text cursor for character writing. ? 32x32 pixel graphic cursor function. ? supporting tft panel resolution: 2 layers : up to 320x240 pixels with internal ddram. 1 layer : up to 640x480 pixels. ? support 256 user-defined 8x16 characters. ? support 32 user-defined patterns of 8x8 pixels. ? 2 programmable pwm for back-light adjusting or other's application. ? embedded 4 or 5-wires touch panel controller. ? 6 sets of programmable gpio (gpio0~5). ? sleep mode with low power consumption. ? operation voltage: 3.0v~3.6v ? package: tqfp-128pin. rai o technology inc. 2/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 3. block diagram mpu i/f block register block 2d-bte engine cgrom scroll engine geometric speed-up engine 4/5 wires touch panel controller analog rgb tft interface db[15:0] rd# / en wr# / rw# cs# rs c86 wait# int# va[18:0] md[15:0] ram_cs# ram_wr# ram_oe# rom_cs# xi xo rst# test[2:0] sense ll / xp lr / xn ul / yp ur/ yn pwm1 pwm2 internal dpram test power control por pattern/ cursor pwm dac gpio/ analog tft adc reset debounce tcon pdat[15:0] hsync / cph1 vsync / cph2 pclk / cph3 de / ckv vr vg vb vrh vrin gpio0 / sth gpio1 / stv gpio2 / oeh gpio3 / oev gpio4 / q1h_ctr gpio5 / com external sram /rom control osc/ pll font engine mpu i/f block register block 2d-bte engine cgrom scroll engine geometric speed-up engine 4/5 wires touch panel controller analog rgb tft interface db[15:0] rd# / en wr# / rw# cs# rs c86 wait# int# va[18:0] md[15:0] ram_cs# ram_wr# ram_oe# rom_cs# xi xo rst# test[2:0] sense ll / xp lr / xn ul / yp ur/ yn pwm1 pwm2 internal dpram test power control por pattern/ cursor pwm dac gpio/ analog tft adc reset debounce tcon pdat[15:0] hsync / cph1 vsync / cph2 pclk / cph3 de / ckv vr vg vb vrh vrin gpio0 / sth gpio1 / stv gpio2 / oeh gpio3 / oev gpio4 / q1h_ctr gpio5 / com external sram /rom control osc/ pll font engine figure 3-1 : internal block diagram 8/16 bits 8080/6800 mpu RA8870 crystal 4/5 wire touch panel booster (back-light adj.) tft driver tft panel external display ram (option) external font rom (option) figure 3-2 : system block diagram rai o technology inc. 3/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 4. pin definition 4-1 mcu interface pin name i/o pin# pin description db[15:0] io 109, 110, 114~ 127 data bus these are data bus for data transfer between mcu and RA8870. the db[15:8] is input and should be pulled to gnd or vdd when 8-bit data bus mode is used. rd# / en i 104 enable/read enable when mcu interface (i/f) is 8080 series, this pin is used as data read (rd#), active low. when mcu i/f is 6800 series, this pin is used as enable (en), active high. wr# / rw# i 105 write/read-write when mcu i/f is 8080 series, this pi n is used as data write (wr#), active low. when mcu i/f is 6800 series, this pin is used as data read/write control (rw#). active high for read and active low for write. cs# i 106 chip select input low active chip select pin. rs i 107 command / data select input the pin is used to select comm and/data cycle. rs = 0, data read/write cycle is selected. rs = 1, status read/command write cycle is selected. in 8080 interface, usually it connects to ?a0? address pin. rs wr# access cycle 0 0 data write 0 1 data read 1 0 cmd write 1 1 status read c86 i 108 mcu interface select 0 : 8080 interface is selected. 1 : 6800 interface is selected. int# o 11 interrupt signal output the interrupt output for mcu to i ndicate the status of RA8870. wait# o 10 wait signal output this is a wait output to indicate the RA8870 is in busy state. the RA8870 can?t access mcu cycle when wait# pin is active. it is active low and could be used for mcu to poll busy status by connecting it to i/o port. rai o technology inc. 4/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 4-2 lcd panel interface pin name i/o pin# pin description pdat[15:0] o 78~93 lcd panel data bus data bus output for tft lcd panel driver ic. this data bus must be connected to the corresponding bus of tft-lcd panel. hsync / cph1 o 74 hsync pulse / cph1 when generic tft is selected, the signal is used as hsync. when analog tft is selected, the signal is used as cph1. vsync / cph2 o 75 vsync pulse / cph2 when generic tft is selected, the signal is used as vsync. when analog tft is selected, the signal is used as cph2. pclk / cph3 o 76 pixel clock / cph3 when generic tft is selected, the signal is used as pclk. when analog tft is selected, the signal is used as cph3. de/ ckv o 77 data enable / ckv when generic tft is selected, the signal is used as de. when analog tft is selected, the signal is used as ckv. gpio0 / sth io 58 general purpose i/o 0 / sth when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as sth. gpio1 / stv io 59 general purpose i/o 1 / stv when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as stv. gpio2 / oeh io 60 general purpose i/o 2/oeh when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as oeh. gpio3 / oev io 61 general purpose i/o 3/oev when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as oev. gpio4 / q1h_ctr io 62 general purpose i/o 4 / q1h_ctr when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as q1h_ctr. it is the control signal for q1h. gpio5 / com io 63 general purpose i/o 5 / com when generic tft is selected, the signal is used as gpio signal; user can program it by register. when analog tft is selected, the signal is used as com. it is the control signal of vcom. rai o technology inc. 5/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 pin name i/o pin# pin description vr o 69 analog r output the analog output for analog tft driver red data denotation. vg o 68 analog g output the analog output for analog tft driver green data denotation. vb o 67 analog b output the analog output for analog tft driver blue data denotation. 4-3 touch panel and pwm interface pin name i/o pin# pin description ur / yn a 102 ur/yn signal for touch panel touch panel control signal. when 5-wires tp is selected, it is used as ur output signal. when 4-wires tp is selected, it is used as yn switch signal. ul / yp a 101 ul/yp signal for touch panel touch panel control signal. when 5-wires tp is selected, it is used as ul output signal. when 4-wires tp is selected, it is used as yp switch signal. this pin must be connected a 100k ? pull-up resistor when the touch panel function is enable. lr / xn a 99 lr/xn signal for touch panel touch panel control signal. when 5-wires tp is selected, it is used as lr output signal. when 4-wires tp is selected, it is used as xn switch signal. ll / xp a 103 ll/xp signal for touch panel touch panel control signal. when 5-wires tp is selected, it is used as ll output signal. when 4-wires tp is selected, it is used as xp switch signal. sense a 100 sense signal for 5-wire touch panel when 5-wires tp is selected, it is used as sense analog input signal. when 4-wires tp is selected, it is not used as should be floating. pwm1 pwm2 o 7, 8 pwm output 1 pwm output pin. the duty could be programmed by register setting. rai o technology inc. 6/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 4-4 external memory pin name i/o pin# pin description va[18:0] o 32~42, 46~53 external ram/rom address bus when external font rom is used, va[18:0] is used as external 512kb font rom address bus. when external ddram is used, va[18:0] are also used as ram address bus. when internal ddram is used with no external font rom, va[18:0] should be kept as floating. md[15:0] io 16~31 external ram/rom data bus when external font rom is used, them are used as data bus input signal, only md[7:0] is used. when external ddram is used, t hem are also used as ram r/w data bus. 8-bit or 16-bit interface will be selected by register setting. when internal ddram is used with no external font rom, md[15:0] are suggested to connec ted to vdd for preventing the io leakage. ram_oe# o 56 ram data output enable signal data output enable signal for external ddram. ram_wr# o 55 ram write enable signal write strobe signal for external ddram. ram_cs# o 54 ram chip selection signal chip select signal for external ddram. rom_cs# o 57 rom chip selection signal chip select signal for external font rom. 4-5 clock and power interface pin name i/o pin# pin description xi i 2 crystal input pin input pin for internal crystal circuit. it should be connected to external crystal to generate the source of pll circuit. that will generate the system clock for RA8870. xo o 3 crystal output pin output pin for internal crystal circuit. rst# i 12 reset signal input this active-low input performs a hardware reset on the RA8870. it is a schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered. test[2:0] i 13~15 test mode input for chip test function, should be connected to gnd for normal operation. vrin a 65 dac reference voltage input this is a reference voltage input to create vrh signal. for normal operation, it only need add a 0.1uf capacitor to ground. rai o technology inc. 7/9 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8870 rai o technology inc. 8/9 www.raio.com.tw pin name i/o pin# pin description vrh a 64 dac reference voltage output this is a reference voltage output of dac. for normal operation, it only need add a 0.2uf capacitor to ground. adc_vref a 98 adc reference voltage this pin is the reference voltage input of adc. the reference voltage could be generated by RA8870 or from external circuit. vdd p 6, 45, 113 io vdd 3.3v io power input. ldo_vdd p 1, 72 ldo vdd 3.3v power source for ldo. the internal ldo will generate the 1.8v power output. ldo_gnd p 71, 128 ldo gnd ground signal for internal ldo. ldo_out p 73 ldo output 1.8v power generated by internal ldo. it must connect bypass capacities to prevent power noise. ldo_cap p 4 ldo capacitor input it must connect 1uf bypass capacities to prevent power noise. core_vdd p 43, 112 core vdd core vdd is 1.8v.the core power input that connect to ldo_out. it must connect 1uf bypass capacities to prevent power noise. adc_vdd p 95, 96 adc vdd adc 3.3v power signals. please connect this signal to 3.3v. adc_gnd p 97 adc gnd adc ground signal. please connect this signal to ground. dac_vdd p 66 dac vdd dac 3.3v power signal. please connect this signal to 3.3v. dac_gnd p 70 dac gnd dac ground signal. please connect this signal to ground. gnd p 5, 9, 44, 94, 111 gnd io cell/core ground signals.
version 1.1 brief specification character/graphic tft lcd controller ra o technology inc. 9/9 www.raio.com.tw RA8870 5. package 5 10 15 20 25 35 40 45 50 55 65 70 75 80 85 100 105 110 120 115 raio tm RA8870l4n 30 60 90 95 125 ldo_vdd xi xo ldo_cap gnd vdd pwm1 pwm2 gnd wait# int# rst# test0 test1 test2 md0 md1 md2 md3 md4 md5 md6 md7 md8 md9 md10 md11 md12 md13 md14 md15 va0 vrh gpio5 gpio4 gpio3 gpio2 gpio1 gpio0 rom_cs# ram_oe# ram_wr# ram_cs# va18 va17 va16 va15 va14 va13 va12 va11 vdd gnd core_vdd va10 va9 va8 va7 va6 va5 va4 va3 va2 va1 adc_vdd adc_vdd gnd pdat15 pdat14 pdat13 pdat12 pdat11 pdat10 pdat9 pdat8 pdat7 pdat6 pdat5 pdat4 pdat3 pdat2 pdat1 pdat0 de pclk vsync hsync ldo_out ldo_vdd ldo_gnd dac_gnd vr vg vb dac_vdd vrin adc_gnd adc_vref lr sense ul ur ll rd# wr# cs# rs c86 db0 db1 gnd core_vdd vdd db2 db3 db4 db5 db6 db7 db8 db9 db10 db11 db12 db13 db14 db15 ldo_gnd 5 10 15 20 25 35 40 45 50 55 65 70 75 80 85 100 105 110 120 115 raio tm RA8870l4n 30 60 90 95 125 ldo_vdd xi xo ldo_cap gnd vdd pwm1 pwm2 gnd wait# int# rst# test0 test1 test2 md0 md1 md2 md3 md4 md5 md6 md7 md8 md9 md10 md11 md12 md13 md14 md15 va0 vrh gpio5 gpio4 gpio3 gpio2 gpio1 gpio0 rom_cs# ram_oe# ram_wr# ram_cs# va18 va17 va16 va15 va14 va13 va12 va11 vdd gnd core_vdd va10 va9 va8 va7 va6 va5 va4 va3 va2 va1 adc_vdd adc_vdd gnd pdat15 pdat14 pdat13 pdat12 pdat11 pdat10 pdat9 pdat8 pdat7 pdat6 pdat5 pdat4 pdat3 pdat2 pdat1 pdat0 de pclk vsync hsync ldo_out ldo_vdd ldo_gnd dac_gnd vr vg vb dac_vdd vrin adc_gnd adc_vref lr sense ul ur ll rd# wr# cs# rs c86 db0 db1 gnd core_vdd vdd db2 db3 db4 db5 db6 db7 db8 db9 db10 db11 db12 db13 db14 db15 ldo_gnd
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